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A SHA-256 Hybrid-Redundancy Hardware Architecture for Detecting and Correcting Errors.

Ignacio Algredo-Badillo1, Miguel Morales-Sandoval2, Alejandro Medina-Santiago1

  • 1Department of Computer Science, CONACYT-National Institute for Astrophysics, Optics and Electronics, Puebla 72840, Mexico.

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Summary

This study introduces a novel hybrid SHA-256 hardware architecture using a 3-stage pipeline for enhanced data integrity in message-passing communications. The new design balances processing, efficiency, and cost while improving performance and preventing data loss.

Keywords:
SHA-256fault detectionhardware architecturehardware redundancypipeline architecturetime redundancy

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Area of Science:

  • Computer Engineering
  • Information Security
  • Digital Systems

Background:

  • Data integrity is crucial for secure message-passing communications in emergent technologies.
  • The SHA-256 algorithm is vital for data validation but faces hardware implementation challenges.
  • Existing SHA-256 hardware architectures struggle with real-time balance, efficiency, and cost, lacking internal failure prevention.

Purpose of the Study:

  • To develop a novel hybrid SHA-256 hardware architecture that addresses limitations in current implementations.
  • To enhance data integrity and security in message-passing communications.
  • To improve the real-time balance among processing, efficiency, and cost.

Main Methods:

  • A novel hybrid architecture implemented on a 3-stage pipeline structure was developed.
  • Pipelining was uniquely employed for hardware and time redundancies to ensure data integrity.
  • Hardware resources and performance were analyzed to balance the critical path.

Main Results:

  • The proposed architecture achieved a throughput of 441.72 Mbps with 2255 LUTs.
  • An efficiency of 195.8 Kbps/LUT was reported, demonstrating improved performance.
  • The pipeline technique effectively implemented hardware and time redundancies for SHA-256 calculations.

Conclusions:

  • The novel hybrid SHA-256 architecture offers improved performance and efficiency for secure communications.
  • The pipeline-based redundancy approach successfully enhances data integrity and fault tolerance.
  • This work presents a viable solution for balancing critical path, hardware resources, and performance in SHA-256 implementations.