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Real-time single-pixel imaging using a system on a chip field-programmable gate array.

Ikuo Hoshi1, Tomoyoshi Shimobaba2, Takashi Kakue2

  • 1Graduate School of Engineering, Chiba-University, 1-33, Yayoi-cho, Inage-ku, Chiba, Japan. aeka2345@chiba-u.jp.

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|August 18, 2022
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Summary
This summary is machine-generated.

A new compact computer using a field-programmable gate array (FPGA) enables real-time single-pixel imaging reconstruction. This dedicated system accelerates image processing for enhanced single-pixel imaging applications.

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Area of Science:

  • Optics and Photonics
  • Computer Engineering

Background:

  • Single-pixel imaging offers high sensitivity and noise robustness but requires significant computational power for image reconstruction.
  • Real-time reconstruction with high image quality is a major challenge for current single-pixel imaging systems.

Purpose of the Study:

  • To develop a compact, dedicated computer for accelerating single-pixel imaging reconstruction.
  • To enable real-time, high-quality image reconstruction for single-pixel imaging applications.

Main Methods:

  • Developed a compact computer utilizing a system on a chip field-programmable gate array (FPGA).
  • Implemented a novel reconstruction algorithm with encoding mask pattern optimization on the FPGA circuit.
  • Achieved real-time reconstruction at 40 frames per second for 128 × 128 pixel images.

Main Results:

  • The dedicated FPGA computer accelerates reconstruction 10 times faster than a recent CPU.
  • The system enables real-time single-pixel imaging reconstruction at 40 fps with 128 × 128 resolution.
  • The compact design facilitates integration into Internet of Things and outdoor applications.

Conclusions:

  • The developed compact FPGA computer significantly enhances the feasibility of real-time single-pixel imaging.
  • This innovation overcomes computational bottlenecks, paving the way for broader applications of single-pixel imaging technology.