FPGA Applied to Latency Reduction for the Tactile Internet

Area of Science:

• Robotics
• Control Systems
• Computer Engineering

Background:

• Tactile internet applications enable remote robotic control with minimal latency.
• Latency in bilateral communication systems is critical, with 1-10 ms being acceptable.
• Communication networks contribute 70% of total latency, while devices contribute 30%.

Purpose of the Study:

• To propose a strategy for reducing device-associated latency in tactile internet applications.
• To minimize the execution time of algorithms within master and slave robotic devices.
• To present a novel hardware reference model for efficient nonlinear positioning and force calculations.

Main Methods:

• Utilizing Field-Programmable Gate Arrays (FPGAs) to accelerate device-associated algorithms.
• Developing a hardware reference model for robotic manipulator modules.
• Implementing and testing a tactile system with two robotic manipulators.
• Conducting simulations and experimental tests to validate the hardware model.

Main Results:

• Demonstrated latency reduction in device-associated algorithms through FPGA implementation.
• Analyzed FPGA sampling rate, throughput, and latency.
• Evaluated post-synthesis occupancy area of the proposed hardware model.
• Validated the effectiveness of the hardware reference model through simulations and experiments.

Conclusions:

• The proposed FPGA-based strategy effectively reduces device-associated latency in tactile internet systems.
• The hardware reference model is validated for implementing nonlinear positioning and force calculations.
• This approach contributes to improved performance and responsiveness in remote robotic operations.