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SCA-Safe Implementation of Modified SaMAL2R Algorithm in FPGA.
José de Jesús Morales Romero1, Mario Alfredo Reyes Barranca1, David Tinoco Varela2
1Department of Electrical Engineering, CINVESTAV, Mexico City 07360, Mexico.
Micromachines
|November 11, 2022
Summary
This study introduces a secure modular exponentiation algorithm for Field Programmable Gate Arrays (FPGAs), effectively preventing side-channel attacks. The enhanced algorithm also significantly reduces hardware resource usage compared to existing methods.
Area of Science:
- Computer Science
- Cryptography
- Hardware Security
Background:
- Modular exponentiation is crucial for cryptographic algorithms like RSA, DSA, and ECC.
- Non-profiled side-channel attacks, including Simple Power Analysis and Differential Power Analysis, pose a threat to these algorithms.
Purpose of the Study:
- To develop a modified modular exponentiation algorithm resistant to side-channel attacks.
- To implement and evaluate the algorithm on Field Programmable Gate Array (FPGA) devices.
Main Methods:
- Implementation of a modified modular exponentiation algorithm on Virtex-6 and Artix-7 FPGA evaluation boards.
- Evaluation of the algorithm's vulnerability to Simple Power Analysis and Differential Power Analysis.
- Comparative analysis of resource utilization and performance against existing FPGA implementations.
Main Results:
- The proposed algorithm demonstrates immunity to Simple Power Analysis and Differential Power Analysis.
- Significant reduction in hardware resources: 3550 fewer Look-Up Tables and 62,583 fewer Flip-Flops compared to related works.
- Zero memory blocks required, contrasting with other methods that use substantial memory resources.
Conclusions:
- The developed modular exponentiation algorithm offers robust protection against physical side-channel attacks.
- The implementation provides superior resource efficiency on FPGAs.
- Further comparisons of latency across different programmable devices are presented.
