Engineering of dense arrays of Vertical Si_1-Genanostructures

Vertical nanostructure technologies are becoming more important for the down scaling of nanoelectronic devices such as logic transistors or memories. Such devices require dense vertical nanostructured channel arrays (VNCA) that can be fabricated through a top-down approach based on group IV materials. We present progresses on the top-down fabrication of highly anisotropic and ultra-dense Si_1-Ge(x= 0, 0.2, 0.5) VNCAs. Dense nanowire and nanosheet patterns were optimized through high resolution lithography and transferred onto Si_1-Gesubstrates by anisotropic reactive ion etching with a fluorine chemistry. The right gas mixtures for a given Ge content resulted in perfectly vertical and dense arrays. Finally we fabricated oxide shell/SiGe core heterostructures by dry- and wet-thermal oxidation and evaluated their applicability for nanostructure size engineering, as already established for silicon nanowires. The impact of the nanostructured shape (wire or sheet), size and Ge content on the oxide growth were investigated and analysed in detail through transmission electron microscopy.