Effects of High-Temperature Growth of Dislocation Filter Layers in GaAs-on-Si

GaAs-on-Si templates with two different dislocation filter layers (DFLs) were grown at 550 °C low-temperature (LT)-DFL and 660 °C high-temperature (HT)-DFL using metal organic vapor-phase epitaxy and the effects of the growth temperature were studied. The threading dislocation density (TDD) values of LT-DFL and HT-DFL were 5.2 × 10⁷ cm^-2 and 1.5 × 10⁷ cm^-2, respectively. The 1.5 × 10⁷ cm^-2 of TDD in HT-DFL is reduced by almost one order compared to the 1.2 × 10⁸ cm^-2 of that in the control sample without DFLs. The annihilation process was mainly observed in the HT-DFL by a transmission electron microscope, resulting in a lower TDD. The 500-nm-thick GaAs bulk layer and InAs QDs were regrown on GaAs-on-Si templates and the optical properties were also evaluated by photoluminescence (PL). The highest PL peak intensity of the HT-DFL indicates that less non-radiative recombination in both the GaAs bulk and QDs occurred due to the reduced TDD. The GaAs p-i-n diodes were also fabricated to analyze the bulk leakage (J_B) and the surface leakage current. The J_B of HT-DFL shows the lowest value of 3.625 × 10^-7 A/cm^-2 at applied bias voltage of 1 V, which is 20 times lower than the J_B of the control sample without DFLs. This supports that the high-temperature growth of DFL can make a good performance GaAs device on Si.