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GaN Vertical Transistors with Staircase Channels for High-Voltage Applications
Kuntal Barman1, Dai-Jie Lin1, Rohit Gupta1
1Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taipei 10617, Taiwan.
Abstract:
In this study, we propose and simulate the design of a non-regrowth staircase channel GaN vertical trench transistor, demonstrating an exceptional threshold and breakdown characteristic for high power and high frequency applications. The unique staircase design provides a variable capacitance through the gate-dielectric-semiconductor interface, which results in a high breakdown voltage of 1.52 kV and maintains a channel on-resistance of 2.61 mΩ∙cm2. Because of the variable length and doping profile in the channel region, this model offers greater flexibility to meet a wide range of device application requirements.
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