Related Experiment Video
Updated: Aug 5, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Impact of Stress and Dimension on Nanosheet Deformation during Channel Release of Gate-All-Around Device
Jingwen Yang1, Kun Chen1,2, Dawei Wang1
1School of Microelectronics, Fudan University, Shanghai 200433, China.
Abstract:
In this paper, nanosheet deformation during channel release has been investigated and discussed in Gate-All-Around (GAA) transistors. Structures with different source/drain size and stacked Si nanosheet lengths were designed and fabricated. The experiment of channel release showed that the stress caused serious deformation to suspended nanosheets. With the guidance of the experiment result, based on simulation studies using the COMSOL Multiphysics and Sentaurus tools, it is confirmed that the stress applied on the channel from source/drain plays an important role in nanosheet deformation during the fabrication process. The deformation of Si nanosheets would cause a serious degradation of the device performance due to an inability to control the work function of the metal gate. This study proposed that the uniformly stacked GAA nanosheets structure could be successfully demonstrated with suitable channel stress engineering provided by fitting S/D size and an appropriate channel length. The conclusions provide useful guidelines for future stacked GAA transistors' design and fabrication.
Related Concept Videos
Stress-Strain Diagram - Ductile Materials
Plastic Behavior
Stress-Strain Diagram
Stress: General Loading Conditions
The shearing force, possessing potential directionality within the plane of the section, is simplified into two component forces running parallel to the x and y axes....
Stress-Strain Diagram - Brittle Materials
Stress

