Kun Chen
5PUBLICATIONS
4CO-AUTHORS
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Publications (5)
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|Sep 28, 2023
A Buried Thermal Rail (BTR) Technology to Improve Electrothermal Characteristics of Complementary Field-Effect Transistor (CFET).Zhecheng Pan, Tao Liu, Jingwen Yang
|Aug 26, 2023
A Novel Atomic-Level Post-Etch-Surface-Reinforcement Process for High-Performance p-GaN Gate HEMTs Fabrication.Luyu Wang, Penghao Zhang, Kaiyue Zhu
|Jun 28, 2023
Improving Performance of Al2O3/AlN/GaN MIS HEMTs via In Situ N2 Plasma Annealing.Mengyuan Sun, Luyu Wang, Penghao Zhang
|Mar 29, 2023
Impact of Stress and Dimension on Nanosheet Deformation during Channel Release of Gate-All-Around Device.Jingwen Yang, Kun Chen, Dawei Wang
|Jul 27, 2022
Source/Drain Trimming Process to Improve Gate-All-Around Nanosheet Transistors Switching Performance and Enable More Stacks of Nanosheets.Kun Chen, Jingwen Yang, Tao Liu
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