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Controlling the Carrier Injection Efficiency in 3D Nanocrystalline Silicon Floating Gate Memory by Novel Design of
Hongsheng Hu1,2,3, Zhongyuan Ma1,2,3, Xinyue Yu1,2,3
1School of Electronic Science and Engineering, Nanjing University, Nanjing 210093, China.
Nanomaterials (Basel, Switzerland)
|March 29, 2023
Summary
We improved carrier injection efficiency in 3D NAND flash memory using a nanocrystalline silicon floating gate. A thicker control layer enhances efficiency by blocking unwanted carrier transfer, benefiting in-memory computing.
Area of Science:
- Materials Science
- Electrical Engineering
- Computer Engineering
Background:
- Three-dimensional (3D) NAND flash memory offers superior big data processing capabilities compared to traditional von Neumann architectures, particularly for in-memory computing.
- High carrier injection efficiency is crucial for enhancing the performance of 3D NAND flash memory.
- Nanocrystalline silicon (nc-Si) floating gates are a key component in advanced memory technologies.
Purpose of the Study:
- To investigate and report the carrier injection efficiency of 3D NAND flash memory utilizing an nc-Si floating gate.
- To demonstrate how a novel control layer design influences carrier injection efficiency.
- To establish a correlation between capacitance-voltage (C-V) hysteresis direction and carrier injection efficiency.
Main Methods:
- Fabrication of nc-Si floating-gate Metal-Oxide-Semiconductor (MOS) structures with varying control layer thicknesses.
- Measurement and analysis of C-V hysteresis characteristics under different scanning bias conditions.
- Utilizing an energy band model to elucidate the carrier transfer mechanisms and hysteresis direction transitions.
Main Results:
- The C-V hysteresis direction of the nc-Si floating-gate MOS structure serves as a reliable indicator of carrier injection efficiency.
- A control layer thickness of 25 nm consistently resulted in counterclockwise C-V hysteresis, indicating efficient carrier injection.
- Reducing the control layer thickness to 22 nm induced a transition to clockwise C-V hysteresis, attributed to carrier injection into the SiNx control layer defects.
Conclusions:
- Thicker SiNx control layers effectively block unwanted carrier transfer from the top electrode, significantly improving carrier injection efficiency from the Si substrate to the nc-Si layer.
- The observed C-V hysteresis direction transitions are explained by the energy band model, clarifying the underlying carrier injection mechanisms.
- This research provides critical insights for optimizing 3D NAND flash memory performance, paving the way for enhanced in-memory computing applications.
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