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Yin-Yang: Programming Abstractions for Cross-Domain Multi-Acceleration.

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This summary is machine-generated.

Cross-domain multi-acceleration on Field-Programmable Gate Arrays (FPGAs) is essential for complex applications. Our novel Yin-Yang abstractions and XLVM enable seamless integration of multiple FPGA accelerators, achieving significant speedups.

Keywords:
CompilersHardware/Software InterfacesHeterogeneous (Hybrid) SystemsReconfigurable HardwareRuntime Environments

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Area of Science:

  • Computer Engineering
  • Hardware Acceleration
  • Software Engineering

Background:

  • Field-Programmable Gate Arrays (FPGAs) provide performance and efficiency through domain-specific acceleration.
  • Real-world applications frequently span multiple algorithmic domains, necessitating cross-domain acceleration.
  • Current FPGA accelerator architectures lack interoperability between different specialized domains.

Purpose of the Study:

  • To introduce a novel framework enabling cross-domain multi-acceleration on FPGAs.
  • To address the limitations of vertically-specialized FPGA accelerator stacks.
  • To facilitate the development of complex applications utilizing multiple heterogeneous FPGA accelerators.

Main Methods:

  • Proposal of dual abstractions: Yin for algorithmic specification and Yang for accelerator capability capture.
  • Development of the XLVM (eXpressive Low-latency Virtual Machine) dataflow virtual machine.
  • Transparent mapping of domain functions to suitable accelerator capabilities via XLVM.

Main Results:

  • Demonstrated effectiveness using six real-world cross-domain applications.
  • Achieved a 29.4x speedup with the proposed Yin-Yang framework.
  • Outperformed the best single-domain acceleration, which yielded a 12.0x speedup.

Conclusions:

  • The Yin-Yang abstractions and XLVM effectively enable cross-domain multi-acceleration on FPGAs.
  • This approach significantly enhances performance for complex, multi-domain applications.
  • It overcomes the limitations of existing, domain-specific FPGA accelerator designs.