RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults

Area of Science:

• Hardware accelerators for Spiking Neural Networks (SNNs)
• Fault tolerance in embedded systems
• Neuromorphic computing architectures

Background:

• Spiking Neural Network (SNN) chips are crucial for efficient processing in embedded systems.
• Permanent faults in SNN chips can arise from manufacturing defects or operational wear, leading to accuracy degradation.
• Existing mitigation techniques for permanent faults in SNN hardware are not thoroughly investigated.

Purpose of the Study:

• To propose RescueSNN, a novel methodology for mitigating permanent faults in SNN compute engines.
• To reduce design time and retraining costs while maintaining SNN performance and quality.
• To enhance the fault tolerance of SNN chips without requiring additional retraining.

Main Methods:

• Analyzing the characteristics of SNNs under permanent faults.
• Implementing fault-aware mapping (FAM) to improve SNN fault tolerance.
• Developing lightweight hardware enhancements to support FAM for minimizing weight corruption and selectively using faulty neurons.

Main Results:

• RescueSNN improves accuracy by up to 80% in high fault rate scenarios.
• Maintains throughput reduction below 25% even with significant fault locations.
• Demonstrates effective mitigation of permanent faults without retraining SNNs.

Conclusions:

• RescueSNN offers an efficient solution for reliable SNN execution in embedded systems.
• The methodology significantly enhances accuracy and maintains throughput against permanent hardware faults.
• RescueSNN reduces design time and retraining costs for fault-tolerant SNN chips.