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Updated: Jul 31, 2025

Characterization of SiN Integrated Optical Phased Arrays on a Wafer-Scale Test Station
Published on: April 1, 2020
Monolithic silicon photonic 32x32 thin-CLOS AWGR for all-to-all interconnections
Abstract:
This paper reports the design, fabrication, and experimental demonstration of a monolithic silicon photonic (SiPh) 32×32 Thin-CLOS arrayed waveguide grating router (AWGR) for scalable SiPh all-to-all interconnection fabrics. The 32×32 Thin-CLOS makes use of four 16-port silicon nitride AWGRs, which are compactly integrated and interconnected by a multi-layer waveguide routing method. The fabricated Thin-CLOS has 4 dB insertion loss, < -15 dB adjacent channel crosstalk, and < -20 dB non-adjacent channel crosstalk. System experiments operated on the 32×32 SiPh Thin-CLOS demonstrate error-free communication at 25 Gb/s.
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