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Related Concept Videos

Unsymmetric Loading of Thin-Walled Members01:23

Unsymmetric Loading of Thin-Walled Members

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Thin-walled members with non-symmetrical cross-sections are vital to engineering structures, offering material efficiency and structural integrity. However, unsymmetrical loading on these members leads to complex stress distributions, resulting in simultaneous bending and twisting can cause deformation or structural failure. The interaction between bending and twisting requires detailed analysis to ensure structural resilience.
The concept of the shear center is crucial in countering the...
134

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Designing Highly Precise Overlay Targets for Asymmetric Sidewall Structures Using Quasi-Periodic Line Widths and

Hung-Chih Hsieh1, Meng-Rong Wu1, Xiang-Ting Huang1

  • 1Department of Electro-Optical Engineering, National United University, No. 2 Lienda, Miaoli 36063, Taiwan.

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This study presents an optimized overlay target design for semiconductor manufacturing, reducing overlay errors from asymmetric sidewall structures. The new design improves overlay accuracy by adjusting grating linewidth and period, enhancing precision in chip production.

Keywords:
asymmetric profilediffraction-based overlayfinite-difference time-domain simulationoverlay measurementoverlay target design

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Area of Science:

  • Semiconductor Manufacturing
  • Metrology
  • Nanofabrication

Background:

  • Overlay error is a critical challenge in semiconductor manufacturing, impacting device yield and performance.
  • Asymmetric sidewall structures in gratings contribute significantly to overlay errors.
  • Existing overlay target designs struggle to mitigate errors caused by these asymmetries.

Purpose of the Study:

  • To develop an optimized overlay target design to minimize overlay error in semiconductor manufacturing.
  • To address overlay errors specifically caused by asymmetric sidewall structures.
  • To enhance the precision and reliability of overlay measurements.

Main Methods:

  • Derivation of an overlay error formula by decomposing asymmetric bottom grating structures into symmetric and asymmetric components.
  • Analysis of the relationship between grating linewidth and grating period for error reduction.
  • Utilizing simulation to validate the effectiveness of the proposed target design under various conditions.

Main Results:

  • An optimized overlay target design was proposed, featuring a bottom grating linewidth close to the grating period.
  • This design effectively reduces overlay errors stemming from sidewall asymmetry.
  • Simulations confirmed control of measurement errors within ±0.3 nm across different wavelengths, sidewall angles, and film thicknesses.

Conclusions:

  • The proposed overlay target design significantly improves overlay accuracy in semiconductor manufacturing.
  • The findings offer a practical solution for mitigating overlay errors caused by structural asymmetries.
  • This advancement contributes to higher yields and more reliable semiconductor devices.