A RRAM-Based True Random Number Generator with 2T1R Architecture for Hardware Security Applications

Area of Science:

• Materials Science
• Electrical Engineering
• Computer Science

Background:

• Resistance Random Access Memory (RRAM) exhibits intrinsic switching variability, making it suitable for true random number generators (TRNGs).
• The high resistance state (HRS) variation in RRAM is commonly used as the entropy source for TRNGs.
• Small HRS variations due to fabrication processes can lead to errors and noise vulnerability in RRAM-based TRNGs.

Purpose of the Study:

• To propose and validate a novel RRAM-based TRNG architecture for enhanced hardware security.
• To address the limitations of small HRS variations and noise interference in existing RRAM TRNGs.
• To improve the reliability and accuracy of random number generation using RRAM technology.

Main Methods:

• Implementation of a 2T1R architecture for the RRAM-based TRNG.
• Utilizing the high resistance state (HRS) variation as the entropy source.
• Simulation and verification using a 28 nm CMOS process.

Main Results:

• The proposed 2T1R architecture effectively distinguishes HRS resistance values with an accuracy of 1.5 kΩ.
• Error bits are corrected to a certain extent, and noise is suppressed.
• The RRAM-based TRNG macro demonstrated potential for hardware security applications through CMOS process verification.

Conclusions:

• The 2T1R RRAM-based TRNG offers a robust solution for hardware security applications.
• The architecture effectively mitigates issues related to HRS variation and noise.
• This approach enhances the reliability of true random number generation for secure systems.