A Real-Time FPGA-Based Metaheuristic Processor to Efficiently Simulate a New Variant of the PSO Algorithm.

Area of Science:

• Signal Processing
• Artificial Intelligence
• Hardware Acceleration

Background:

• High-performance audio communication systems require superior audio quality.
• Existing acoustic echo cancellers (AECs) using Particle Swarm Optimization (PSO) suffer from performance degradation due to premature convergence.
• There is a need for improved AEC algorithms that maintain high performance while reducing computational complexity.

Purpose of the Study:

• To propose a novel variant of the PSO algorithm to overcome premature convergence in AEC.
• To introduce a dynamic population size adjustment mechanism within the PSO algorithm.
• To present a parallel hardware architecture for implementing the proposed algorithm on an FPGA for high-performance AEC systems.

Main Methods:

• Developed a new PSO variant incorporating the Markovian switching technique.
• Implemented a dynamic population size adjustment mechanism during the filtering process.
• Designed a parallel metaheuristic processor on a Stratix IV GX EP4SGX530 FPGA, utilizing time-multiplexing for variable population simulation.

Main Results:

• The proposed Markovian switching PSO algorithm effectively mitigates premature convergence.
• Dynamic population size adjustment significantly reduces computational cost.
• The parallel hardware architecture enables effective variation of population size for enhanced processing.

Conclusions:

• The proposed algorithm demonstrates superior performance in acoustic echo cancellation.
• The novel parallel hardware architecture facilitates the development of high-performance AEC systems.
• This combined approach offers a promising solution for advanced audio communication devices.