Extremely large area (88 mm × 88 mm) superconducting integrated circuit (ELASIC)

Area of Science:

• Materials Science
• Electrical Engineering
• Quantum Computing

Background:

• Superconducting integrated circuits (ICs) offer potential for high-speed, low-loss cryogenic computing.
• Scalable fabrication of large-area superconducting ICs remains a significant challenge hindering practical applications.

Purpose of the Study:

• To present a novel method for fabricating an extremely large area superconducting integrated circuit (ELASIC).
• To demonstrate the viability of this fabrication technique for advanced superconducting devices.

Main Methods:

• Interconnecting 16 deep ultraviolet (DUV EX4) full reticle circuits using a combination of DUV and I-line lithography.
• Employing I-line reticle stitching to create an 88 mm × 88 mm ELASIC.
• Testing quantum flux parametron circuits for data buffering and transmission.

Main Results:

• Successfully fabricated an 88 mm × 88 mm ELASIC, significantly larger than previous superconducting ICs.
• Achieved a 2X-12X reduction in circuit features while maintaining high superconducting critical currents across stitched lines.
• Demonstrated the functionality of active components for data handling within the ELASIC.

Conclusions:

• The developed fabrication process overcomes the limitations of large-area superconducting IC production.
• This method shows promise for scaling superconducting qubits and other junction-based devices.
• The ELASIC technology paves the way for more complex and scalable cryogenic computing systems.