Geometric control of diffusing elements on InAs semiconductor surfaces via metal contacts.

Area of Science:

• Materials Science
• Nanotechnology
• Surface Chemistry

Background:

• Precise control over elemental composition is crucial for semiconductor synthesis and device fabrication.
• Achieving local geometric control of synthesis parameters on compound semiconductors remains a significant challenge.
• Incongruent evaporation of compound semiconductors, like Indium Arsenide (InAs), can lead to undesirable Indium droplet formation.

Purpose of the Study:

• To propose and demonstrate a method for local geometric control of surface element concentrations using lithographically defined metal stacks.
• To investigate the inhibition of Indium droplet formation on Indium Arsenide surfaces through surface concentration regulation.
• To explore the application of this technique in bottom-up synthesis and top-down device definition on-chip.

Main Methods:

• Utilized lithographically defined Aluminium/Palladium (Al/Pd) metal patterns on Indium Arsenide substrates.
• Annealed samples at temperatures up to 600°C to observe the effect of metal patterns on Indium droplet formation.
• Performed compositional and structural analysis, complemented by theoretical modeling, to understand the underlying mechanisms.

Main Results:

• Al/Pd metal patterns successfully created well-defined droplet-free zones on the InAs surface during annealing.
• The lateral geometry of the lithographic metal patterns was preserved after annealing.
• Palladium (Pd) acted as a sink for free Indium (In) atoms, reducing surface concentration and inhibiting droplet formation, with Aluminium (Al) acting as a diffusion barrier influencing Pd's efficiency.

Conclusions:

• Lithographically defined metal stacks provide effective local geometric control over surface element concentrations in compound semiconductors.
• This approach successfully suppresses Indium droplet formation on InAs surfaces by managing Indium surface diffusion.
• The proposed method is broadly applicable to general lithography-epitaxial manufacturing processes for compound semiconductors.