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In integrated circuit technology, a capacitance multiplier is often utilized to produce a larger capacitance value when a small physical capacitance falls short. This is achieved by a circuit that multiplies capacitance values by a factor of up to 1000, such that a 10-pF capacitor can replicate the performance of a 100-nF capacitor.
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In electrical circuits, resistors can be connected in series, sequentially linked one after the other. In a series configuration, the same current flows through each resistor. Ohm's law is a fundamental principle to understand the behavior of resistors in series. It expresses the voltage across these resistors in terms of the current and resistance.
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In most substances, the current flow is proportional to the voltage applied to it. A simple relationship between the values of current, voltage, and resistance is known as Ohm's law. Nonohmic devices do not exhibit a linear relationship between voltage and current. One such device is the semiconducting circuit element known as a diode. A diode is a circuit device that allows current flow in only one direction.
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A voltage doubler circuit integrates two main components: a clamping section and a rectifier section. The clamping section consists of a capacitor (C1) and a diode (D1), whereas the rectifier section is equipped with another diode (D2) and capacitor (C2). This circuit produces an output voltage with twice the amplitude of the sinusoidal input voltage.
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A clamper circuit, also known as a DC restorer, represents a specialized variant of the rectifier circuit, notable for its method of taking the output across the diode rather than the capacitor. This configuration lends to several distinctive applications, particularly in handling square wave inputs.
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An Ultra-Low-Power Analog Multiplier-Divider Compatible with Digital Code for RRAM-Based Computing-in-Memory Macros.

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This study introduces an ultra-low-power analog multiplier-divider for resistive random-access memory (RRAM) computing-in-memory (CIM). This efficient circuit enhances operation capacity and reduces power consumption in edge computing devices.

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CMOScomputing-in-memorycurrent mirroredge computingmultiplier–divider

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Area of Science:

  • Integrated Circuits
  • Computer Engineering
  • Materials Science

Background:

  • Current multiplication and division methods often face limitations in power consumption and circuit complexity.
  • Resistive random-access memory (RRAM)-based computing-in-memory (CIM) macros require efficient arithmetic operations for enhanced performance.
  • Analog dividers offer advantages in reduced power consumption and simpler structures for lower precision tasks compared to digital counterparts.

Purpose of the Study:

  • To present an ultra-low-power analog multiplier-divider circuit.
  • To enable compatibility with digital code words for RRAM-based CIM macros.
  • To improve energy efficiency in computational tasks.

Main Methods:

  • Design and fabrication of an analog multiplier-divider using a 55 nm CMOS process.
  • Implementation of a current-mirror-based structure for multiplication and division.
  • Evaluation of the circuit's performance, including precision, speed, bandwidth, and power consumption.

Main Results:

  • Achieved 8-bit precision for analog current multiplication and division.
  • Demonstrated a signal delay of 1 μs for 8-bit operations.
  • Measured a bandwidth of 1.4 MHz and power consumption below 6.15 μW at 1.2 V supply voltage.

Conclusions:

  • The proposed multiplier-divider enhances operation capacity while reducing power consumption and complexity.
  • The circuit is suitable for integration into RRAM-based CIM macros.
  • It offers significant potential for real-time operations in edge computing devices.