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Updated: Jul 18, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Performance limit of all-wrapped monolayer MoS2 transistors
Wenbo Zhang1, Binxi Liang1, Jiachen Tang1
1School of Electronic Science and Engineering, National Laboratory of Solid-State Microstructures, and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing 210023, China.
Monolayer MoS2 transistors show promise for future electronics. Theoretical analysis reveals high performance, exceeding 2 mA μm−1 on-state current, even at sub-10 nm channel lengths.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Two-dimensional transition-metal dichalcogenide channels are key for post-silicon electronics.
- All-wrapped transistors offer advanced device architectures.
Purpose of the Study:
- To theoretically survey performance limits of monolayer MoS2 transistors.
- To analyze scattering mechanisms and device indices for miniaturized transistors.
Main Methods:
- Boltzmann transport theory applied to monolayer MoS2 transistors.
- Inclusion of extrinsic charge scattering mechanisms.
- Introduction of a 'dead space' concept to refine phonon scattering calculations.
Main Results:
- Accurate electronic transport behavior described for MoS2 transistors.
- Charge mobility and current density analyzed for sub-1.5 nm nodes.
- On-state current estimated >2 mA μm−1 for <10 nm channel lengths.
Conclusions:
- Extremely miniaturized monolayer-channel transistors offer significant performance benefits.
- These devices are crucial for advancing More-Moore electronics.
- Theoretical insights guide the development of next-generation semiconductor devices.
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