Efficient Thermal-Stress Coupling Design of Chiplet-Based System with Coaxial TSV Array.

Area of Science:

• * Materials Science and Engineering
• * Electrical Engineering
• * Computational Mechanics

Background:

• * Chiplet-based systems require advanced interconnect structures for high performance.
• * Thermal-stress coupling is a critical challenge in designing coaxial through silicon via (CTSV) arrays.
• * Existing design methods may not fully capture the complex relationships between structural parameters and performance.

Purpose of the Study:

• * To develop an efficient thermal-stress coupling design method for Chiplet-based systems with CTSV arrays.
• * To optimize the structural parameters of CTSV arrays for desired thermal and stress performance.
• * To verify the effectiveness of the proposed design method through finite element simulations.

Main Methods:

• * Finite element simulation to analyze the complex relationship between structural parameters and critical indexes.
• * Support vector machine (SVM) model to characterize the relationship between structural parameters and critical indexes.
• * Particle swarm optimization algorithm with linear decreasing inertia weight (PSO-LDIW) for multi-objective optimization.

Main Results:

• * The SVM model effectively characterized the complex relationships within the CTSV array.
• * The PSO-LDIW algorithm optimized structural parameters based on desired critical indexes.
• * Simulated results for peak temperature and stresses closely matched the target values (306.16 K vs 310 K, 28.48 MPa vs 30 MPa, 25.76 MPa vs 25 MPa).

Conclusions:

• * The developed thermal-stress coupling design method is effective for CTSV arrays.
• * This method enables the manufacturing of high-performance interconnect structures for Chiplet-based systems.
• * The integration of SVM and PSO-LDIW offers a robust approach for optimizing complex microelectronic designs.