Vertical tunneling FET with Ge/Si doping-less heterojunction, a high-performance switch for digital applications

Area of Science:

• Semiconductor device physics
• Materials science

Background:

• Traditional transistors face limitations in scaling and power efficiency.
• Tunneling field-effect transistors (TFETs) offer a potential solution for low-power electronics.

Purpose of the Study:

• To present a novel doping-less vertical tunneling heterojunction field-effect transistor (TFET).
• To optimize the TFET's electrostatic control and investigate its performance under various non-ideal conditions.
• To evaluate the TFET's suitability for static random-access memory (SRAM) circuits and its DC/RF application potential.

Main Methods:

• Numerical simulations using Silvaco ATLAS, calibrated with experimental data.
• Investigation of non-idealities including trap-assisted tunneling, interface trap charges, and ambipolar conduction.
• Evaluation of negative capacitance material integration for improved switching characteristics.
• Fabrication and characterization of both n-channel and p-channel devices for a 6T SRAM circuit.

Main Results:

• The proposed vertical TFET exhibits optimized electrostatic control due to a double gate configuration and Hafnium gate oxide.
• Performance metrics include a high on-current (I_on) of 34.4 µA/µm, an excellent on/off ratio (I_on/I_off) of 7.17 × 10⁷, and a high transit frequency (f_T) of 123 GHz.
• Analysis of non-idealities confirms robust device operation.
• Integration into a 6T SRAM circuit shows promising read and write static noise margin (SNM) performance.

Conclusions:

• The doping-less vertical TFET represents a significant advancement in TFET technology.
• The device demonstrates superior performance and robustness, making it a strong candidate for future low-power DC and high-frequency RF applications.
• The integration into SRAM circuits highlights its potential for high-performance memory applications.