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Related Experiment Video

Updated: Jul 14, 2025

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

Published on: May 13, 2020

First demonstration of in-memory computing crossbar using multi-level Cell FeFET.

Taha Soliman¹, Swetaki Chatterjee^2,3, Nellie Laleni⁴

¹Robert Bosch GmbH, Renningen, Germany. taha.soliman@de.bosch.com.

Nature Communications

|October 10, 2023

Summary

This summary is machine-generated.

This study introduces a novel in-memory computing (IMC) crossbar macro using multi-level ferroelectric field-effect transistor (FeFET) cells for efficient multi-bit multiply and accumulate (MAC) operations, achieving high accuracy and performance.

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Area of Science:

Semiconductor device physics
Artificial intelligence hardware
Computer architecture

Background:

Artificial intelligence (AI) advancements necessitate efficient computing and memory solutions.
In-memory computing (IMC) architectures offer a promising approach to address these challenges.
Ferroelectric field-effect transistors (FeFETs) are emerging as key components for advanced memory and computing.

Purpose of the Study:

To introduce a novel IMC crossbar macro employing a multi-level FeFET cell.
To enable multi-bit multiply and accumulate (MAC) operations using a single FeFET per resistor (1FeFET-1R) cell.
To minimize device variability effects on computational accuracy in IMC.

Main Methods:

Design and fabrication of a 1FeFET-1R crossbar macro using 28 nm HKMG technology FeFET devices.
Leveraging the electrical characteristics of stored data within FeFETs for MAC operations.
Encoding MAC results in activation time and accumulated current, bypassing traditional resistive memory approaches.

Main Results:

Experimental validation demonstrating high accuracy for handwriting recognition (96.6%) and image classification (91.5%) without retraining.
Achieved exceptional energy efficiency of 885.4 TOPS/W, nearly doubling existing designs.
Successfully implemented a complete MAC operation macro using multi-state FeFET cells, maintaining crossbar density.

Conclusions:

The proposed FeFET-based IMC macro offers a viable solution for high-performance, low-power AI hardware.
This work represents a significant advancement in realizing dense, efficient in-memory computing architectures.
The novel approach demonstrates the potential of multi-level FeFET cells for future AI accelerators.