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A Design Methodology for Fault-Tolerant Neuromorphic Computing Using Bayesian Neural Network.

Di Gao¹, Xiaoru Xie², Dongxu Wei³

¹The School of Intelligent Manufacturing, Hangzhou Polytechnic, Hangzhou 311402, China.

|October 28, 2023

Summary

This summary is machine-generated.

This study introduces a Bayesian neural network method to improve neuromorphic computing with memristor crossbar arrays. It accounts for device variations to ensure reliable inference performance, enhancing fault tolerance.

Keywords:

Bayesian neural network memristor crossbar array neuromorphic computing process variation variational inference

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Area of Science:

Neuromorphic computing
Materials science
Artificial intelligence

Background:

Memristor crossbar arrays are key for neuromorphic computing.
Process variations cause stochastic weight distributions, impacting inference accuracy.
Accurate weight distribution learning is crucial for reliable memristor-based systems.

Purpose of the Study:

To develop a fault-tolerant design methodology for neuromorphic computing using memristor crossbar arrays.
To address inference performance degradation caused by memristor process variations.
To enhance the robustness of neuromorphic systems against device uncertainties.

Main Methods:

Utilized a Bayesian neural network framework.
Combined variational Bayesian inference with a fault-aware variational posterior distribution.
Incorporated memristor deviations into algorithmic training to optimize weight distributions.

Main Results:

The proposed Bayesian inference framework successfully integrated memristor variations into training.
Optimized weight distributions accommodated uncertainties and minimized inference degradation.
Experimental results demonstrated tolerance to process variations and noise, ensuring robust computing.

Conclusions:

The developed methodology enables fault-tolerant neuromorphic computing in memristor crossbar arrays.
Bayesian neural networks effectively mitigate inference performance loss due to memristor variations.
This approach enhances the reliability and robustness of next-generation computing hardware.