Radix-4 CORDIC algorithm based low-latency and hardware efficient VLSI architecture for Nth root and Nth power...

Area of Science:

• Digital Signal Processing
• VLSI Architecture Design
• Computer Arithmetic

Background:

• Existing methods for fixed-point root and power computation often rely on radix-2 COordinate Rotion DIgital Computer (CORDIC) algorithms.
• Radix-2 CORDIC algorithms suffer from high computation latency, posing a challenge for efficient hardware implementation.
• The complexity of radix-4 CORDIC, while offering faster convergence, is a barrier due to intricate logic and scale factor management.

Purpose of the Study:

• To propose a low-complexity VLSI architecture for computing the root and power of fixed-point numbers using a radix-4 hyperbolic CORDIC.
• To address the hardware complexity and computational challenges associated with radix-4 CORDIC algorithms.
• To improve hardware utilization and error performance compared to existing radix-2 CORDIC-based approaches.

Main Methods:

• A modified radix-4 hyperbolic vectoring (R4HV) CORDIC is used for logarithm computation with simplified input-dependent rotation criteria.
• Radix-4 linear vectoring (R4LV) CORDIC is employed for division operations.
• A modified scaling-free radix-4 hyperbolic rotation (R4HR) CORDIC is utilized for exponential computation, with pre-computed scale factors and scaling-free rotations.

Main Results:

• The proposed modified R4HV CORDIC simplifies angle selection criteria, reducing hardware complexity.
• The R4HR CORDIC achieves reduced complexity by pre-computing scale factors and using scaling-free rotations.
• Hardware analysis indicates superior hardware utilization compared to recent methods, with FPGA implementation showing a 20% reduction in hardware usage and better error performance.

Conclusions:

• The proposed low-complexity VLSI architecture based on modified radix-4 hyperbolic CORDIC effectively computes root and power functions for fixed-point numbers.
• The architectural modifications significantly reduce hardware complexity and improve performance metrics.
• The implemented Virtex-6 FPGA solution demonstrates practical advantages in terms of hardware efficiency and accuracy over radix-2 CORDIC methods.