Design of Low-Noise CMOS Image Sensor Using a Hybrid-Correlated Multiple Sampling Technique

Area of Science:

• Electronics
• Image Sensors
• Semiconductor Devices

Background:

• CMOS image sensors (CIS) are crucial for digital imaging.
• Low illumination conditions present challenges for noise reduction in CIS.
• Conventional-correlated double sampling (CDS) has limitations in improving noise performance.

Purpose of the Study:

• To develop an advanced sampling technique for improved noise characteristics in CIS.
• To enhance the performance of CIS under low light conditions.
• To present a novel hybrid-correlated multiple sampling (HMS) technique integrated with an adaptive dual-gain analog-to-digital converter (ADC).

Main Methods:

• Implementation of a 320 × 240 CMOS image sensor (CIS).
• Utilizing a proposed hybrid-correlated multiple sampling (HMS) technique with an adaptive dual-gain ADC.
• Adjusting ADC gain based on incident light, employing either HMS or conventional CDS with varying ramping signals.

Main Results:

• Achieved 11-bit ADC resolution using an up-down counter.
• Fabricated on a 0.11 μm CIS process with a chip area of 2.55 mm × 4.3 mm.
• Demonstrated a 26.7% reduction in maximum dark random noise and a 49.1% improvement in the figure of merit compared to conventional CDS.
• Reported a total power consumption of 5.1 mW at 19 frames per second.

Conclusions:

• The proposed HMS technique effectively improves noise characteristics in CIS, especially under low illumination.
• The adaptive dual-gain ADC integrated with HMS offers superior performance over conventional methods.
• This advancement contributes to higher quality imaging in challenging lighting environments.