Neuron pruning in temporal domain for energy efficient SNN processor design.

Area of Science:

• Neuromorphic Engineering
• Artificial Intelligence
• Computer Architecture

Background:

• Deep convolutional spiking neural networks (SNNs) achieve high accuracy by incorporating convolutional neural network (CNN) parameters.
• High computational demands in deep SNNs hinder energy-efficient processor design, representing a significant bottleneck.
• Existing SNNs require optimization for reduced computation to enable widespread deployment in power-constrained applications.

Purpose of the Study:

• To develop an input-dependent computation reduction approach for deep convolutional SNNs.
• To identify and prune less important neurons without compromising classification accuracy.
• To enhance the energy efficiency and processing speed of SNN hardware.

Main Methods:

• Proposed a neuron pruning technique operating in the temporal domain, identifying and pruning less important neurons based on layer-wise membrane voltage thresholds.
• Developed two pruning threshold search algorithms to efficiently balance accuracy and computational complexity for a target computation reduction ratio.
• Implemented the proposed pruning scheme in a 65nm CMOS SNN processor.

Main Results:

• Achieved a 57% reduction in energy consumption and a 2.68x speed-up for the SNN processor.
• Demonstrated minimal accuracy loss (up to 0.82%) on the CIFAR-10 dataset.
• Observed a 7.3% area overhead for the implemented pruning scheme.

Conclusions:

• The proposed input-dependent neuron pruning effectively reduces computation in SNNs, leading to significant energy savings and faster processing.
• This method offers a viable strategy for designing energy-efficient SNN processors without substantial accuracy degradation.
• The temporal domain pruning approach is suitable for hardware implementation, paving the way for practical neuromorphic computing.