Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of...

Amorphous oxide semiconductors (AOSs) with low off-currents and processing temperatures offer promising alternative materials for next-generation high-density memory devices. The complex vertical stacking process of memory devices significantly increases the probability of encountering internal contact issues. Conventional surface treatment methods developed for planar devices necessitate efficient approaches to eliminate contact issues at deep internal interfaces in the nanoscale complex structures of AOS devices. In this work, we report the pioneering use of palladium thin film as a high-efficiency active hydrogen transfer pathway from the outside to the internal contact interface via low-temperature postannealing in the H₂ atmosphere, and the formation of highly conductive metallic interlayer effectively solves the contact issues at the deeply buried interfaces in devices. The application of this method reduced the contact resistance of Pd electrodes/amorphous indium-gallium-zinc oxide (a-IGZO) thin-film by 2 orders of magnitude, and thereby the mobility of thin-film transistor was increased from 3.2 cm² V^-1 s^-1 to nearly 20 cm² V^-1 s^-1, preserving an excellent bias stress stability. This technology has wide applicability for the solution of contact resistance issues in oxide semiconductor devices with complex architectures.