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Design Example: Capacitance Multiplier Circuit

Design Example: Capacitance Multiplier Circuit

In integrated circuit technology, a capacitance multiplier is often utilized to produce a larger capacitance value when a small physical capacitance falls short. This is achieved by a circuit that multiplies capacitance values by a factor of up to 1000, such that a 10-pF capacitor can replicate the performance of a 100-nF capacitor.
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.

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Inverting and Non-inverting OpAmps

In an inverting amplifier, the input voltage is connected through a resistor to the inverting terminal. Meanwhile, the non-inverting terminal is grounded and a feedback resistor is established between the inverting and output terminal, as depicted in Figure 1.

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An electrocardiography (ECG) machine is an essential piece of medical equipment used to monitor the electrical activity of the heart. It operates by detecting small electrical changes on the skin that result from the depolarization of the heart muscle during each heartbeat. However, these signals are in the microvolt range and can be easily overwhelmed by noise or interference.
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This study introduces a novel circuit to linearize micro-opto-electro-mechanical systems (MOEMS) accelerometers, improving accuracy for high-sensitivity applications. The new design enhances acceleration detection resolution and range, benefiting industries like automotive and military.

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Area of Science:

Micro-opto-electro-mechanical systems (MOEMS)
Sensor signal conditioning
MEMS accelerometers

Background:

Micro-grating accelerometers exhibit nonlinear sine/cosine output relative to acceleration.
Existing linearization methods may struggle with phase, magnitude, and offset errors.
High-precision acceleration detection is crucial for advanced applications.

Purpose of the Study:

To propose a novel linearization signal conditioning circuit for tri-axial MOEMS accelerometers.
To achieve a linear digital output across the full acceleration range.
To improve the resolution and accuracy of acceleration detection.

Main Methods:

Utilized a subdivision interpolation technique to process nonlinear intensity variations.
Incorporated a 90-degree phase-shift circuit and high-precision DC bias-voltage circuits.
Minimized errors from phase, magnitude, and offset of sine-cosine signals.

Main Results:

Achieved sub-mg resolution for the tri-axial micro-grating MOEMS accelerometer.
Demonstrated low cross-axis errors: 3.57% (x-axis), 1.22% (y-axis), 0.89% (z-axis).
Reported bias instabilities < 26 µg and velocity random walks < 38.7 µg/√Hz.

Conclusions:

The proposed circuit effectively linearizes MOEMS accelerometer output.
The enhanced accelerometer offers high sensitivity and large operation ranges.
Significant potential for automotive and military equipment applications.