An Energy Efficient and Temperature Stable Digital FLL-based Wakeup Timer with Time-Domain Temperature Compensation

Minyoung Song1, Ming Ding2, Yao-Hong Liu2

  • 1Department of Electrical Engineering and Computer Science, Daegu Gyeongbuk Institute of Science and Technology (DGIST), Daegu, South Korea.

IEEE Transactions on Circuits and Systems. II, Express Briefs : a Publication of the IEEE Circuits and Systems Society
|July 4, 2024
PubMed
Summary

This study introduces a digital frequency-locked loop (DFLL)-based wakeup timer that uses temperature compensation to maintain stable operating frequency. This innovation ensures precise timing for low-power applications across various temperatures.

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