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Updated: Jun 17, 2025

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Deterministic grayscale nanotopography to engineer mobilities in strained MoS2 FETs
Xia Liu1,2, Berke Erbas3, Ana Conde-Rubio3,4
1Microsystems Laboratory, École Polytechnique Fédérale de Lausanne (EPFL), 1015, Lausanne, Switzerland. xia.liu@bit.edu.cn.
Abstract:
Field-effect transistors (FETs) based on two-dimensional materials (2DMs) with atomically thin channels have emerged as a promising platform for beyond-silicon electronics. However, low carrier mobility in 2DM transistors driven by phonon scattering remains a critical challenge. To address this issue, we propose the controlled introduction of localized tensile strain as an effective means to inhibit electron-phonon scattering in 2DM. Strain is achieved by conformally adhering the 2DM via van der Waals forces to a dielectric layer previously nanoengineered with a gray-tone topography. Our results show that monolayer MoS2 FETs under tensile strain achieve an 8-fold increase in on-state current, reaching mobilities of 185 cm²/Vs at room temperature, in good agreement with theoretical calculations. The present work on nanotopographic grayscale surface engineering and the use of high-quality dielectric materials has the potential to find application in the nanofabrication of photonic and nanoelectronic devices.
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