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Related Experiment Video

Updated: Jun 14, 2025

Transmission of Multiple Signals through an Optical Fiber Using Wavefront Shaping
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An ADPLL-Based GFSK Modulator with Two-Point Modulation for IoT Applications.

Nam-Seog Kim1

  • 1Department of Information and Communication Engineering, School of Electrical and Computer Engineering, Chungbuk National University, Cheongju-si 28644, Republic of Korea.

Sensors (Basel, Switzerland)
|August 29, 2024
PubMed
Summary

This study introduces an all-digital phase-locked loop (ADPLL)-based Gaussian frequency shift keying (GFSK) modulator for enhancing Bluetooth low energy (BLE) efficiency in wireless sensor networks (WSNs). The novel design achieves high performance with low power consumption.

Keywords:
Bluetooth low energy (BLE)Gaussian frequency shift keying (GFSK)Internet of Things (IoT)all-digital phase-locked loop (ADPLL)digitally controlled oscillator (DCO)frequency shift keying (FSK) errorfrequency tuning rangeleast mean square (LMS) algorithmlow dropout regulator (LDO)phase noiseprocess, voltage, and temperature (PVT) variationsstable modulation index (SMI)time-to-digital converter (TDC)two-point modulation (TPM)wireless sensor networks (WSNs)

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Area of Science:

  • Electrical Engineering
  • Computer Engineering
  • Wireless Communication

Background:

  • Wireless sensor networks (WSNs) and Internet of Things (IoT) devices require energy-efficient communication like Bluetooth low energy (BLE).
  • Existing BLE modulators face challenges in efficiency and performance for ubiquitous WSN applications.
  • The 2.4 GHz frequency band is crucial for short-range IoT device communication.

Purpose of the Study:

  • To present a novel, fully integrated all-digital phase-locked loop (ADPLL)-based Gaussian frequency shift keying (GFSK) modulator.
  • To enhance the efficiency and performance of BLE communication for WSNs and IoT devices.
  • To meet BLE 5.0 stable modulation index (SMI) requirements.

Main Methods:

  • Incorporation of a two-point modulation (TPM) technique.
  • Design of a time-to-digital converter (TDC) with fast settling time, adaptive LDOs, and ADC-assisted interpolation.
  • Development of a digitally controlled oscillator (DCO) with delta-sigma modulator dithering, hierarchical capacitive banks, and LMS algorithm for calibration.

Main Results:

  • Implementation in a 28 nm CMOS process with an active area of 0.33 mm².
  • Demonstrated wide frequency tuning range (2.21–2.58 GHz) and low in-band phase noise (-102.1 dBc/Hz).
  • Achieved a low FSK error of 1.42% with a power consumption of 1.6 mW.

Conclusions:

  • The developed ADPLL-based GFSK modulator offers a significant advancement for energy-efficient BLE communication.
  • The design features contribute to improved linearity, time resolution, and frequency tuning range.
  • This modulator is well-suited for ubiquitous and energy-efficient WSNs and IoT applications.