Robust Pixel Design Methodologies for a Vertical Avalanche Photodiode (VAPD)-Based CMOS Image Sensor

Area of Science:

• Solid-state physics
• Image sensor technology
• Microelectronics engineering

Background:

• Traditional CMOS image sensors face challenges with pixel isolation, sensitivity to environmental variations, and performance under intense light.
• Vertical avalanche photodiodes (VAPDs) offer potential for enhanced sensitivity but require robust pixel design for practical application.

Purpose of the Study:

• To develop and validate a robust pixel design methodology for VAPD-based CMOS image sensors.
• To address critical practical factors including guard-ring-free isolation, insensitivity to voltage/temperature, and stable operation under intense illumination.

Main Methods:

• Developed a guard-ring-free pixel isolation layout by optimizing the trade-off between electric field concentration and isolation.
• Implemented a global feedback resistor to suppress variations in photon detection efficiency and dark count rate.
• Introduced an in-pixel overflow transistor to improve resistance to strong illumination.

Main Results:

• The guard-ring-free design was validated through simulation and experimental characterization.
• Global feedback effectively minimized device characteristic variations across different voltages and temperatures.
• The fabricated VAPD-CIS demonstrated robust performance, verified by testing 122 chips and a 1000-hour high-temperature/intense-light test.

Conclusions:

• The proposed pixel design methodology significantly enhances the robustness and stability of VAPD-based CMOS image sensors.
• The design overcomes key limitations, enabling reliable sensor operation in demanding environmental conditions and high light intensities.