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Parallel Resonance

Parallel Resonance

The parallel RLC circuit is an arrangement where the resistor (R), inductor (L), and capacitor (C) are all connected to the same nodes and, as a result, share the same voltage across them. The parallel RLC circuit is analyzed in terms of admittance (Y), which reflects the ease with which current can flow. The admittance is given by:

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Related Experiment Video

Updated: Jun 13, 2025

Measurement of Quantum Interference in a Silicon Ring Resonator Photon Source

Measurement of Quantum Interference in a Silicon Ring Resonator Photon Source

Published on: April 4, 2017

High-coherence parallelization in integrated photonics.

Xuguang Zhang¹, Zixuan Zhou¹, Yijun Guo¹

¹State Key Laboratory of Advanced Optical Communications System and Networks, School of Electronics, Peking University, Beijing, China.

Nature Communications

|September 10, 2024

Summary

This summary is machine-generated.

We developed a low-cost, high-coherence parallelization strategy for integrated photonics. This method boosts on-chip gain and enables ultra-high data rates for advanced coherent systems.

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Last Updated: Jun 13, 2025

Measurement of Quantum Interference in a Silicon Ring Resonator Photon Source

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Published on: April 4, 2017

Characterization of SiN Integrated Optical Phased Arrays on a Wafer-Scale Test Station

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Published on: April 1, 2020

A Photonic System for Generating Unconditional Polarization-Entangled Photons Based on Multiple Quantum Interference

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Published on: September 5, 2019

Area of Science:

Photonics
Integrated Optics
Laser Technology

Background:

Coherent optics are crucial for communications, LiDAR, and quantum computing.
Integrated photonics face challenges in hardware integration and energy efficiency for coherent systems.

Purpose of the Study:

To demonstrate a cost-effective, high-coherence parallelization strategy for integrated coherent systems.
To overcome limitations in current integrated photonic technologies.

Main Methods:

Utilizing a self-injection locked microcomb to injection lock distributed feedback lasers.
Implementing a parallelization strategy for enhanced coherence and gain.

Main Results:

Achieved a record 60 dB on-chip gain without coherence degradation.
Enabled highly coherent channels with linewidths down to 10 Hz and power over 20 dBm.
Reached 19% electrical-to-optical efficiency, comparable to advanced semiconductor lasers.

Conclusions:

The developed strategy enables scalable, high-performance coherent integrated photonic systems.
This approach significantly reduces digital signal processing (DSP) consumption.
Paves the way for applications requiring high-speed, low-power coherent optics.