On-Chip Thermoelectric Devices Based on Standard Silicon Processing.

Area of Science:

• Materials Science
• Nanotechnology
• Solid-State Physics

Background:

• Nanostructured silicon exhibits significantly reduced thermal conductivity compared to bulk silicon.
• This property makes it a promising material for thermoelectric applications, including energy harvesting and localized cooling.
• Existing silicon device integration technologies offer a pathway for on-chip thermoelectric generators (TEGs) and coolers.

Purpose of the Study:

• To present the design and fabrication of novel on-chip thermoelectric devices.
• To utilize interconnected monocrystalline silicon nanobeams for enhanced thermoelectric performance.
• To overcome fabrication challenges for integrated silicon-based thermoelectric scavengers and coolers.

Main Methods:

• Fabrication of tall (>1 µm) and thin (<200 nm) monocrystalline silicon nanobeams.
• Arrangement of nanobeams in large-area comb-like structures.
• Engineering nanobeam width to reduce thermal conductivity and height for high density.

Main Results:

• Achieved reduced thermal conductivity due to the small width of the nanobeams.
• Enabled high density of nanostructures owing to their height perpendicular to the substrate.
• Ensured mechanical stability and increased power density through a broader total cross-section.

Conclusions:

• The developed fabrication process is suitable for creating dense, stable, and high-performance on-chip thermoelectric devices.
• The nanobeam design enhances thermoelectric efficiency and power output per unit area.
• This work advances the realization of integrated silicon-based micro-thermoelectric generators and coolers.