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Updated: Jun 9, 2025
09:49
In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
Published on: May 13, 2020
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Analog reservoir computing via ferroelectric mixed phase boundary transistors.
Jangsaeng Kim1,2,3, Eun Chan Park1, Wonjun Shin3,4
1Department of Electronic Engineering, Hanyang University, Seoul, 04763, Republic of Korea.
Nature Communications
|October 23, 2024
Summary
This study presents an integrated analog reservoir computing (ARC) system using ferroelectric-based transistors. This novel hardware efficiently processes temporal data for real-world time-series predictions.
Area of Science:
- Materials Science
- Computer Engineering
- Artificial Intelligence
Background:
- Analog reservoir computing (ARC) offers efficient temporal information processing.
- Hardware implementation of ARC is challenging due to distinct component functionalities.
Purpose of the Study:
- To develop a fully integrated ARC system leveraging novel materials.
- To address hardware implementation challenges in ARC systems.
Main Methods:
- Utilized ferroelectric-to-mixed phase boundary (MPB) hafnium zirconium oxides integrated onto indium-gallium-zinc oxide thin-film transistors (TFTs).
- Employed MPB-based TFTs (MPBTFTs) for physical reservoirs and artificial neurons, and nonvolatile ferroelectric TFTs for synaptic behavior in readout networks.
- Implemented a double-gate configuration for MPBTFTs to enhance reservoir state differentiation and neuronal functionality.
Main Results:
- Achieved seamless integration of ARC components on a single wafer.
- Demonstrated complex real-world time-series predictions with a low normalized root mean squared error of 0.28.
- Showcased minimal hardware burden for neuronal functionality processing both excitatory and inhibitory pulses.
Conclusions:
- The material-device co-optimization enables efficient and integrated ARC systems.
- Paved the way for area- and energy-efficient ARC development.
- Successfully executed complex temporal data processing using a novel hardware approach.
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