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Related Concept Videos

Semiconductors01:22

Semiconductors

There is variation in the electrical conductivity of materials - metals, semiconductors, and insulators that are showcased with the help of the energy band diagrams.
Metals such as copper (Cu), zinc (Zn), or lead (Pb) have low resistivity and feature conduction bands that are either not fully occupied or overlap with the valence band, making a bandgap non-existent. This allows electrons in the highest energy levels of the valence band to easily transition to the conduction band upon gaining...
Metal-Semiconductor Junctions01:24

Metal-Semiconductor Junctions

The contact of metal and semiconductor can lead to the formation of a junction with either Schottky or Ohmic behavior.
Schottky Barriers
Schottky barriers arise when a metal with a work function (Φm) contacts a semiconductor with a different work function (Φs). Initially, electrons transfer until the Fermi levels of the metal and semiconductor align at equilibrium. For instance, if Φm > Φs, the semiconductor Fermi level is higher than the metal's before contact. The semiconductor's...
P-N junction01:11

P-N junction

A p-n junction is formed when p-type and n-type semiconductor materials are joined together. At the interface of the p-n junction, holes from the p-side and electrons from the n-side begin to diffuse into the opposite sides due to the concentration gradient. This diffusion of carriers leads to a region around the junction where there are no free charge carriers, known as the depletion region. The charge density within the depletion region for the n-side and p-side can be described by the...
Schottky Barrier Diode01:27

Schottky Barrier Diode

Schottky barrier diodes are specialized semiconductor devices characterized by their unique construction. This construction involves combining a metal layer with a moderately doped n-type semiconductor material. This combination leads to the formation of a Schottky barrier, a pivotal element that defines the diode's operational characteristics. The core functionality of Schottky barrier diodes is their capacity to allow current to flow in only one direction due to their distinctive...
Biasing of Metal-Semiconductor Junctions01:27

Biasing of Metal-Semiconductor Junctions

Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
Types of Semiconductors01:20

Types of Semiconductors

Intrinsic semiconductors are highly pure materials with no impurities. At absolute zero, these semiconductors behave as perfect insulators because all the valence electrons are bound, and the conduction band is empty, disallowing electrical conduction. The Fermi level is a concept used to describe the probability of occupancy of energy levels by electrons at thermal equilibrium. In intrinsic semiconductors, the Fermi level is positioned at the midpoint of the energy gap at absolute zero. When...

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Related Experiment Video

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Fabrication of Schottky Diodes on Zn-polar BeMgZnO/ZnO Heterostructure Grown by Plasma-assisted Molecular Beam Epitaxy
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Fabrication of Schottky Diodes on Zn-polar BeMgZnO/ZnO Heterostructure Grown by Plasma-assisted Molecular Beam Epitaxy

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Bridging the p-type gap in oxide electronics with 2D semiconductors.

Taikyu Kim1, Seokhyun Hwang2, Jae Kyeong Jeong3

  • 1Department of Electrical Engineering, Stanford University, Stanford, CA, USA.

Communications Engineering
|July 7, 2026
PubMed
Summary

Monolithic 3D integration using 2D semiconductors enables denser, more energy-efficient chips. This review explores pathways for high-performance 2D p-channel transistors essential for advanced computing systems.

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Semiconductor Physics

Background:

  • Monolithic three-dimensional (3D) integration, placing logic and memory in the back-end-of-line (BEOL), is crucial for advancing AI, cloud, and edge computing.
  • Complementary metal-oxide-semiconductor (CMOS) technology in BEOL requires pairing p-type and n-type transistors.

Purpose of the Study:

  • To review manufacturing-aligned strategies for developing high-performance 2D p-channel transistors.
  • To assess the feasibility of integrating 2D p-type semiconductors into monolithic 3D BEOL CMOS.

Main Methods:

  • Assessment of transfer-free, low-temperature growth techniques for 2D materials.
  • Evaluation of methods for achieving clean van der Waals contacts.
  • Analysis of p-doping strategies and mitigation of material degradation (crystallization, volatility, interdiffusion).

Main Results:

  • Identified key challenges in 2D p-channel transistor fabrication, including doping and material stability.
  • Examined recent demonstrations of gain-cell and vertical complementary field-effect transistors (CFETs).

Conclusions:

  • Achieving manufacturable, high-performance 2D p-type semiconductors is critical for dense, low-power monolithic 3D chips.
  • Further research into controlled growth, doping, and interface engineering is necessary for practical BEOL integration.