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    This study introduces an automated framework for generating hardware Trojans (HTs) within design space exploration (DSE) for deep neural networks (DNNs). The novel approach embeds stealthy HTs into accelerator IPs, enabling controlled attacks with minimal overhead.

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    Area of Science:

    • Computer Engineering
    • Cybersecurity
    • Artificial Intelligence

    Background:

    • Design Space Exploration (DSE) accelerates the deployment of deep neural networks (DNNs) by automating the generation of optimal configurations and accelerator intellectual properties (IPs).
    • The security implications of DSE, particularly concerning hardware Trojans (HTs), have been largely overlooked despite the widespread use of DSE tools.
    • Existing DSE methods focus on optimization, leaving a vulnerability for adversarial attacks to be embedded during the automated IP generation process.

    Purpose of the Study:

    • To explore the security vulnerabilities of Design Space Exploration (DSE) from an adversarial perspective.
    • To propose and evaluate an automated framework for generating hardware Trojans (HTs) embedded within DSE.
    • To demonstrate the effectiveness of stealthy HTs in causing controlled accuracy degradation and specified category attacks on DNNs.

    Main Methods:

    • Developed an automated hardware Trojan (HT) generation framework integrated into the DSE process.
    • Utilized an evolutionary algorithm (EA) to analyze user-input data for automatic generation of attack code.
    • Embedded the generated HTs into the final accelerator intellectual property (IP) designs for DNNs.

    Main Results:

    • The proposed HT framework successfully embedded stealthy Trojans into accelerator IPs for FPGAs, suitable for single and multi-field designs.
    • Experiments on LeNet, VGG-16, and YOLO models demonstrated significant accuracy degradation and successful category-specific attacks, e.g., 97.3% misclassification for LeNet.
    • The HT designs exhibited minimal overhead, with Look-Up Table (LUT) usage not exceeding 0.6% compared to uncompromised designs.

    Conclusions:

    • The automated HT generation framework integrated with DSE presents a significant security threat to DNN deployments.
    • The stealthy nature and controlled attack capabilities of the proposed HTs highlight the need for enhanced security measures in DSE.
    • Further research is required to develop robust defenses against such embedded adversarial attacks within automated hardware design flows.