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Related Concept Videos

MOS Capacitor01:25

MOS Capacitor

708
A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
708
MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

295
Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
295

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Updated: Jun 7, 2025

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High performance Si-MoS2 heterogeneous embedded DRAM.

Kai Xiao1, Jing Wan2, Hui Xie1

  • 1School of Information Science and Technology, Fudan University, Shanghai, P. R. China.

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|November 12, 2024
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Summary
This summary is machine-generated.

A new heterogeneous memory combines silicon and molybdenum disulfide (MoS2) for advanced embedded Dynamic RAM (eDRAM). This breakthrough significantly improves data retention and integration density for high-performance processors.

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Semiconductor Physics

Background:

  • Embedded Dynamic RAM (eDRAM) is crucial for high-performance processor caches.
  • Conventional gain cell (GC) eDRAMs suffer from short data retention.
  • One transistor and one capacitor (1T1C) eDRAMs require bulky pillar capacitors.

Purpose of the Study:

  • To develop a capacitorless eDRAM solution addressing retention and integration challenges.
  • To leverage the unique properties of silicon (Si) and molybdenum disulfide (MoS2) in a hybrid design.
  • To enhance cache performance in advanced processors.

Main Methods:

  • Fabrication of a heterogeneous two transistor capacitorless eDRAM (2T-eDRAM) using Si and MoS2.
  • Utilizing MoS2 for the write transistor (low OFF current) and Si for the read transistor (high drive current).
  • Implementing a three-dimensional (3D) stacking design with back-end-of-line (BEOL) processing.

Main Results:

  • Achieved 1000x enhancement in data retention compared to Si or MoS2-only counterparts.
  • Increased sense margin by 100x.
  • Demonstrated 6000s data retention, 35 μA/μm sense margin, and 5ns access speeds.
  • Achieved doubled integration density through 3D stacking.
  • Maintained CMOS logic compatibility.

Conclusions:

  • The Si-MoS2 2T-eDRAM offers superior performance, overcoming limitations of conventional eDRAMs.
  • This hybrid technology enables higher integration density and improved cache efficiency.
  • Represents a significant advancement in memory technology for high-performance computing.