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Updated: Jun 6, 2025

Multi-Modal Home Sleep Monitoring in Older Adults

Multi-Modal Home Sleep Monitoring in Older Adults

Published on: January 26, 2019

A Field-Programmable Gate Array-Based Adaptive Sleep Posture Analysis Accelerator for Real-Time Monitoring.

Mangali Sravanthi^1,2, Sravan Kumar Gunturi¹, Mangali Chinna Chinnaiah^3,4

¹Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Aziz Nagar, Hyderabad 500075, Telangana, India.

Sensors (Basel, Switzerland)

|November 27, 2024

Summary

This summary is machine-generated.

This study introduces a real-time sleep posture monitoring system for the elderly using edge computation. An FPGA-based Hierarchical Binary Classifier algorithm enables accurate posture detection and communication to support services.

Keywords:

FPGA adaptive posture analysis sensor fusion sleep posture recognition

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Area of Science:

Biomedical Engineering
Computer Engineering
Gerontology

Background:

Real-time sleep posture monitoring is crucial for elderly and patient care.
Existing methods face challenges in accuracy and real-time processing.
Edge computation offers a promising solution for on-device, low-latency monitoring.

Purpose of the Study:

To develop a hardware-based edge computation system for real-time sleep posture monitoring.
To enhance patient care and support for the elderly through accurate posture detection.
To implement and validate an FPGA-based algorithm for adaptive posture classification.

Main Methods:

Utilized minimally optimized sensing modules and fusion techniques for initial posture detection.
Employed posture-learning processing elements (PEs) for standard and adaptive posture evaluation.
Developed a Field-Programmable Gate Array (FPGA)-based Hierarchical Binary Classifier (HBC) algorithm for real-time classification.
Integrated Internet of Things (IoT) and display devices for seamless communication of posture data.

Main Results:

Achieved real-time sleep posture detection and classification using the FPGA-based HBC algorithm.
Demonstrated effective posture learning and analysis through customized VLSI architectures.
Validated the system's performance using a Zed Board-based FPGA Xilinx board.

Conclusions:

The proposed system effectively monitors sleep posture in real time for elderly and patient care.
Hardware-based edge computation and FPGA implementation provide an efficient solution for posture monitoring.
The system facilitates timely communication to attendant/support services, improving care outcomes.