A low switching loss GaN trench MOSFET design utilizing a triple-shield structure

Area of Science:

• Materials Science
• Electrical Engineering
• Semiconductor Physics

Background:

• Gallium Nitride (GaN) MOSFETs are crucial for high-frequency and high-power applications.
• Reducing parasitic gate-drain charge (Qgd) is essential for improving switching performance and efficiency in MOSFETs.

Purpose of the Study:

• To propose and investigate an innovative GaN trench MOSFET design with ultra-low gate-drain charge (Qgd).
• To analyze the operational mechanisms of the novel design using TCAD simulations.

Main Methods:

• Technology Computer-Aided Design (TCAD) simulations were employed to investigate the device physics.
• A novel triple-shield structure, termed BPSG-MOS, was designed and analyzed.
• The proposed structure includes a grounded split gate (SG), a P+ shield region (PSR), and a semi-wrapped BP layer.

Main Results:

• The BPSG-MOS design significantly reduces gate-drain coupling through the SG and PSR components.
• The BP layer further refines gate-drain capacitance (Cgd) by converting sidewall Cgd into gate-source capacitance (Cgs).
• Compared to PSGT-MOS and TG-MOS, BPSG-MOS achieved 81% and 98% reductions in Cgd, respectively, leading to ultra-low Qgd.

Conclusions:

• The proposed BPSG-MOS structure effectively minimizes gate-drain charge (Qgd) in GaN trench MOSFETs.
• This novel design offers substantial improvements in parasitic capacitance reduction, paving the way for more efficient power devices.