Mixed-Dimensional Semiconductors-Based Ternary Circuits with Tunable Negative Transconductance Characteristics

Area of Science:

• Materials Science
• Electrical Engineering
• Semiconductor Physics

Background:

• Multivalued logic (MVL) systems promise higher data density and processing efficiency compared to binary systems.
• Existing MVL systems using negative transconductance (NTC) devices face challenges like reduced output swing and poorly defined logic states.
• Van der Waals (vdW) heterojunctions of low-dimensional semiconductors offer a potential pathway for improved MVL device performance.

Purpose of the Study:

• To demonstrate ternary inverter circuits with near rail-to-rail output swing and distinct logic states.
• To utilize vdW p-n heterojunctions of single-walled carbon nanotubes (SWCNT) and MoS2 for stable MVL operations.
• To leverage scalable fabrication methods for practical MVL device realization.

Main Methods:

• Fabrication of vdW p-n heterojunctions using inkjet-printed SWCNTs and CVD-grown MoS2.
• Characterization of heterojunction field-effect transistors (H-FETs) and their NTC characteristics.
• Adjustment of p-channel characteristics via inkjet printing to control NTC region width.

Main Results:

• Demonstrated ternary inverter circuits exhibiting near rail-to-rail output swing and three stable logic states.
• Achieved stable middle logic state operation over a wide input voltage range.
• Established a correlation between p-channel characteristics, NTC region width, and ternary inverter performance.

Conclusions:

• Ternary inverter circuits based on SWCNT/MoS2 vdW heterojunctions offer a viable solution for advanced MVL systems.
• Scalable fabrication techniques like inkjet printing and CVD are crucial for realizing practical low-dimensional MVL devices.
• Optimized NTC characteristics through device engineering enable robust ternary logic operations.