Low interface state density and large capacitive memory window using RF sputtered NiO nanoparticles decorated MgZnO...

Area of Science:

• Materials Science
• Nanotechnology
• Solid-State Electronics

Background:

• Development of advanced memory devices is crucial for next-generation electronics.
• Nanoparticle-based structures offer unique properties for charge storage applications.

Purpose of the Study:

• To design and characterize a novel memory device utilizing nickel oxide (NiO) nanoparticles (NPs) over a magnesium zinc oxide (MgZnO) thin film.
• To investigate the charge trapping and de-trapping mechanisms responsible for memory effects.

Main Methods:

• Synthesis of NiO NPs using the glancing angle deposition (GLAD) technique.
• Fabrication of a MgZnO thin film/NiO NPs memory device.
• Characterization using capacitance-voltage (C-V) hysteresis, endurance, and retention measurements.
• Resistive switching analysis.

Main Results:

• Uniform distribution of ~9.5 nm NiO NPs on MgZnO thin film.
• Demonstrated charge trapping/de-trapping mechanism via C-V hysteresis.
• Achieved low interface state density (1.45 × 10^10 eV^-1 cm^-2) and a large capacitive memory window (~6 V).
• Exhibited good endurance (>1000 cycles) and retention (up to 2 × 10^4 s).
• Reported a high on-off ratio (1.24 × 10^2) in resistive switching.

Conclusions:

• The MgZnO/NiO NPs structure enables efficient charge storage and memory operation.
• The enhanced performance is attributed to the large effective area and quantum confinement effects of NiO NPs.
• The proposed device structure shows significant potential for future non-volatile memory applications.