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Related Concept Videos

MOS Capacitor01:25

MOS Capacitor

688
A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
688

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Related Experiment Video

Updated: May 31, 2025

Writing and Low-Temperature Characterization of Oxide Nanostructures
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Ultralow Power Cold-Fuse Memory Based on Metal-Oxide-CNT Structure.

Wufan Chen1, Xueping Li2, Xuezhou Ma1

  • 1Key Lab for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, School of Electronics, Peking University, Beijing 100871, China.

Nano Letters
|January 24, 2025
PubMed
Summary
This summary is machine-generated.

Researchers developed a novel "cold" fuse (C-fuse) memory using carbon nanotube field-effect transistors. This secure one-time programmable (OTP) memory offers ultra-low power consumption and high performance for advanced electronic circuits.

Keywords:
CNT FETscold breakdowncold fusegate tunnelingultralow power

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Area of Science:

  • Semiconductor device physics
  • Nanomaterials science
  • Secure memory technology

Background:

  • One-time programmable (OTP) memory is crucial for chip security.
  • Traditional dielectric breakdown OTP memory suffers from high programming currents and power consumption.

Purpose of the Study:

  • To introduce a new OTP memory mechanism based on carbon nanotube (CNT) field-effect transistors.
  • To develop a secure, low-power alternative to conventional OTP memory.

Main Methods:

  • Investigated gate tunneling-induced "cold" breakdown in CNT field-effect transistors.
  • Constructed a "cold" fuse (C-fuse) memory device utilizing this phenomenon.
  • Characterized the C-fuse memory's programming current, resistance ratio, retention time, and uniformity.

Main Results:

  • Demonstrated a gate tunneling-induced "cold" breakdown in CNTs, distinct from dielectric breakdown.
  • Achieved ultra-low programming current (10^-12 A) and a high resistance ratio (>10^11).
  • Exhibited excellent long-term data retention (>10 years) and good device uniformity.

Conclusions:

  • The C-fuse memory offers superior performance and significantly lower power consumption compared to traditional OTP.
  • This represents the first OTP memory based on low-dimensional nanomaterials.
  • C-fuse memory shows great potential for next-generation secure storage circuits.