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FPGA-based process, voltage, and temperature insensitive picosecond resolution timing generators with offset

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This study introduces a picosecond timing generator (TG) for automatic test equipment that maintains accuracy despite process, voltage, and temperature (PVT) changes. Its robust design ensures stable performance and a 5 ps resolution, enhancing testing efficiency.

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Area of Science:

  • Electrical Engineering
  • Computer Engineering
  • Instrumentation

Background:

  • Automatic test equipment requires precise timing generators.
  • Variations in process, voltage, and temperature (PVT) significantly impact timing generator performance.
  • Existing timing generators often suffer from reduced accuracy due to PVT fluctuations.

Purpose of the Study:

  • To implement a picosecond resolution timing generator (TG) insensitive to PVT variations.
  • To enhance the test rate and adaptability of the TG for automatic test equipment.
  • To ensure stable and reliable TG performance across diverse operating conditions.

Main Methods:

  • Field-programmable gate arrays (FPGAs) were utilized for implementation.
  • A two-stage time interpolation technique employing a multi-phase generator, IDELAY3, and carry-chain resources was adopted.
  • A robust offset canceler was designed to mitigate PVT sensitivity and ensure stable operation.

Main Results:

  • The implemented TG achieved a picosecond resolution of 5 ps.
  • A maximum dynamic range of 10 s was obtained.
  • Improved worst-case integral non-linearity (-4.7 to +4.6 ps) was observed across a temperature range of 15-65°C and voltage range of 0.95-1.01 V.

Conclusions:

  • The proposed PVT-insensitive TG architecture demonstrates high accuracy and stability for automatic test equipment.
  • The integration of a robust offset canceler effectively addresses performance degradation caused by PVT variations.
  • The design is suitable for implementation on Ultrascale or Ultrascale+ FPGA platforms, offering a valuable solution for advanced testing applications.