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Defect-Tolerant Memristor Crossbar Circuits for Local Learning Neural Networks.

Seokjin Oh¹, Rina Yoon¹, Kyeong-Sik Min¹

¹School of Electrical Engineering, Kookmin University, Seoul 02707, Republic of Korea.

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|February 13, 2025

Summary

This summary is machine-generated.

This study introduces a new time-multiplexing technique for Equilibrium Propagation (EP) using memristor circuits. This method improves defect tolerance in memristor-based neural network training, enhancing recognition rates.

Keywords:

defect-tolerant memristor circuits equilibrium propagation local learning neural networks

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Area of Science:

Neuromorphic Engineering
Computational Neuroscience
Materials Science

Background:

Local learning algorithms like Equilibrium Propagation (EP) offer energy-efficient alternatives to backpropagation for neural network training.
Memristor-based circuits are promising for hardware implementation of EP but face challenges due to fabrication defects and variability.
Existing EP implementations using memristors require separate circuits for free and nudge phases, leading to performance degradation.

Purpose of the Study:

To propose a novel time-multiplexing technique for integrating EP's free and nudge phases into a single memristor circuit.
To address the limitations of previous EP implementations caused by memristor defects and variability.
To enhance the robustness and efficiency of memristor-based neural network training.

Main Methods:

Developed a time-multiplexing scheme to combine the dynamic equations of EP's free and nudge phases within a single memristor circuit.
Integrated defect and variability compensation mechanisms directly into the circuit design.
Simulated the proposed circuit's performance using the MNIST dataset.

Main Results:

The proposed time-multiplexing technique maintained a 92% recognition rate on the MNIST dataset, even with a 10% memristor defect rate.
The previous implementation scheme showed a significant performance drop to 33% recognition rate under the same defect conditions.
The novel circuit design resulted in reduced area overhead for both the EP solver and weight-update control circuits.

Conclusions:

The proposed time-multiplexing technique effectively compensates for memristor defects and variability in EP-based neural networks.
This approach offers a more robust and efficient solution for implementing local learning algorithms in hardware.
The findings pave the way for more practical and scalable neuromorphic computing systems using memristor technology.