A 0.53-μW/channel calibration-free spike detection IC with 98.8-%-accuracy based on stationary wavelet transforms and...

Objective. The brain-computer interface is currently experiencing a surge in the number of recording channels, resulting in a vast amount of raw data. It has become crucial to reliably detect neural spikes from a large population of neurons in the presence of noise, in order to constrain the transmission bandwidth.Approach. We investigate various time-frequency analysis methods for spike detection, followed by an exploration of energy operators amplifying spikes and signal statistics for adaptive thresholding. Subsequently, we introduce a precise and computationally efficient spike detection module, leveraging stationary wavelet transform (SWT), Teager energy operator, and root-mean-square calculator. This module is capable of autonomously adapting to different levels of noise. The SWT effectively eliminates high-frequency noise, enhancing the performance of the energy operators. The hardware computational process is simplified through the use of the lifting scheme and a channel-interleaving architecture.Main results. We evaluate the proposed spike detector with adaptive threshold on the publicly available WaveClus datasets. The detector achieves an average accuracy of 98.84%. The application-specific integrated circuit (ASIC) implementation results of the spike detector demonstrate an optimized interleaving channel of 8. In a 65 nm technology, the 8-channel spike detector consumes a power of 0.532μW Ch^-1and occupies an area of 0.00645 mm²Ch^-1, operating at a 1.2 V supply voltage.Significance. The proposed spike detection processor offers one of the highest accuracies among state-of-the-art spike detection methods. Importantly, the ASIC explores the considerations in the scalability and hardware costs. The proposed design provides a systematic solution on spike detection with adaptive thresholding, offering a high accuracy while maintaining low power and area consumptions.