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Dynamic Buffer Management in Massively Parallel Systems: The Power of Randomness.

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Area of Science:

  • Computer Science
  • High-Performance Computing
  • System Software

Background:

  • Massively parallel systems like Graphics Processing Units (GPUs) are vital for data-intensive computing.
  • Developing efficient system software for numerous parallel threads presents unique challenges.
  • Traditional dynamic memory allocators struggle with global data structure bottlenecks in parallel environments.

Purpose of the Study:

  • To propose a novel dynamic memory allocation approach for massively parallel systems that avoids centralized data structures.
  • To enhance memory allocation efficiency and reduce latency in GPU computing.
  • To improve the performance of GPU algorithms through advanced memory management.

Main Methods:

  • Developed a dynamic memory allocation strategy utilizing random search procedures for threads to locate free memory pages.
  • Designed advanced techniques to address warp divergence and optimize performance under limited free memory conditions.
  • Integrated and evaluated the proposed memory management techniques within GPU algorithms like hash join and group-by.

Main Results:

  • The basic random search design demonstrated lower latency compared to existing solutions in most scenarios.
  • Advanced techniques achieved an order of magnitude improvement over the basic design.
  • The state-of-the-art was consistently outperformed by up to two orders of magnitude in performance gains.
  • Case studies showed pronounced performance improvements in GPU hash join and group-by algorithms.

Conclusions:

  • The proposed random search-based dynamic memory allocation effectively eliminates centralized data structure bottlenecks in massively parallel systems.
  • Advanced techniques offer substantial performance enhancements, significantly outperforming current state-of-the-art memory management solutions.
  • The practical integration into GPU algorithms validates the approach's effectiveness and broad applicability in high-performance computing.