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Researchers developed a programmable 2D material transistor array for energy-efficient computing. This complementary metal oxide semiconductor (CMOS) array integrates memory and logic functions, paving the way for advanced logic-in-memory circuits.

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Nanotechnology

Background:

  • Two-dimensional (2D) materials offer unique electronic properties for next-generation devices.
  • Integrating memory and logic functions is crucial for energy-efficient computing.

Purpose of the Study:

  • To fabricate a programmable 2D material-based complementary metal oxide semiconductor (CMOS) array.
  • To demonstrate logic functions and memory capabilities in a 2D material system.
  • To explore energy-efficient logic-in-memory circuits.

Main Methods:

  • Fabrication of a 2H-MoTe2 floating-gate field-effect transistor (FGFET)-based CMOS array using coplanar 1T'-MoTe2 electrodes.
  • Manipulation of 2H-MoTe2 channel conductivity via top-gate engineering for p/n-type conversion.
  • Implementation of programming voltage pulses to modulate device characteristics.

Main Results:

  • Achieved a memory window of ~10.6 V and ultra-low power consumption of 0.39 nW.
  • Demonstrated stable and reproducible logic functions with a high device yield of 90%.
  • Successfully integrated memory and logic functionalities on a single chip.

Conclusions:

  • The developed 2D material CMOS array enables energy-efficient logic-in-memory operations.
  • The fabrication process is compatible with silicon-based manufacturing, facilitating scalability.
  • This work opens new avenues for advanced 2D material-based electronic circuits.