Electronic Chip Package and Co-Packaged Optics (CPO) Technology for Modern AI Era: A Review

With the growing demand for high-performance computing (HPC), artificial intelligence (AI), and data communication and storage, new chip technologies have emerged, following Moore's Law, over the past few decades. As we enter the post-Moore era, transistor dimensions are approaching their physical limits. Advanced packaging technologies, such as 3D chiplets hetero-integration and co-packaged optics (CPO), have become crucial for further improving system performance. Currently, most solutions rely on silicon-based technologies, which alleviate some challenges but still face issues such as warpage, bumps' reliability, through-silicon vias' (TSVs) and redistribution layers' (RDLs) reliability, and thermal dissipation, etc. Glass, with its superior mechanical, thermal, electrical, and optical properties, is emerging as a promising material to address these challenges, particularly with the development of femtosecond laser technology. This paper discusses the evolution of both conventional and advanced packaging technologies and outlines future directions for design, fabrication, and packaging using glass substrates and femtosecond laser processing.